Original Xilinx Remoteproc Binding

zynqmp-rpu {
    compatible = "xlnx,zynqmp-r5-remoteproc-1.0";
    #address-cells = <2>;
    #size-cells = <2>;
    ranges;
    core_conf = "split";
    reg = <0x0 0xFF9A0000 0x0 0x10000>;
    r5_0: r5@0 {
        #address-cells = <2>;
        #size-cells = <2>;
        ranges;
        memory-region = <&rproc_0_reserved>, <&rpu0vdev0buffer>, <&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
        pnode-id = <0x7>;
        mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
        mbox-names = "tx", "rx";
        tcm_0_a: tcm_0@0 {
            reg = <0x0 0xFFE00000 0x0 0x10000>;
            pnode-id = <0xf>;
        };
        tcm_0_b: tcm_0@1 {
            reg = <0x0 0xFFE20000 0x0 0x10000>;
            pnode-id = <0x10>;
        };
    };
};

zynqmp_ipi1 {
    compatible = "xlnx,zynqmp-ipi-mailbox";
    interrupt-parent = <&gic>;
    interrupts = <0 29 4>;
    xlnx,ipi-id = <7>;
    #address-cells = <1>;
    #size-cells = <1>;
    ranges;

    /* APU<->RPU0 IPI mailbox controller */
    ipi_mailbox_rpu0: mailbox@ff990600 {
        reg = <0xff990600 0x20>,
              <0xff990620 0x20>,
              <0xff9900c0 0x20>,
              <0xff9900e0 0x20>;
        reg-names = "local_request_region",
                "local_response_region",
                "remote_request_region",
                "remote_response_region";
        #mbox-cells = <1>;
        xlnx,ipi-id = <1>;
    };
};

Xilinx Binding recent upstream posting

r5fss@ff9a0000 {
    compatible = "xlnx,zynqmp-r5-remoteproc";
    #address-cells = <2>;
    #size-cells = <2>;
    ranges;
    reg = <0x0 0xff9a0000 0x0 0x10000>;
    xlnx,cluster-mode = <0>;

    r5f_0 {
         compatible = "xilinx,r5f";
         memory-region = <&elf_load0>,
                         <&rpu0vdev0vring0>,
                         <&rpu0vdev0vring1>,
                         <&rpu0vdev0buffer>;
         sram = <&tcm_0a>, <&tcm_0b>;
         mboxes = <&ipi_mailbox_rpu0 0x0 &ipi_mailbox_rpu0 0x1>;
         mbox-names = "tx", "rx";
         power-domain = <0x7>;
    };
 };

zynqmp_ipi1 {
    compatible = "xlnx,zynqmp-ipi-mailbox";
    interrupt-parent = <&gic>;
    interrupts = <0 33 4>;
    xlnx,ipi-id = <5>;
    #address-cells = <1>;
    #size-cells = <0>;

    ipi_mailbox_rpu0: mailbox@ff990600 {
        reg = <0xff990600 0x20>,
              <0xff990620 0x20>,
              <0xff9900c0 0x20>,
              <0xff9900e0 0x20>;
        reg-names = "local_request_region",
        "local_response_region",
        "remote_request_region",
        "remote_response_region";
        #mbox-cells = <1>;
        xlnx,ipi-id = <3>;
    };
    ipi_mailbox_rpu1: mailbox@ff990780 {
        reg = <0xff990780 0x20>,
              <0xff9907a0 0x20>,
              <0xff9907c0 0x20>,
              <0xff9905a0 0x20>;
        reg-names = "local_request_region",
        "local_response_region",
        "remote_request_region",
        "remote_response_region";
        #mbox-cells = <1>;
        xlnx,ipi-id = <3>;
    };
};

TI K3 binding

mcu_r5fss0: r5fss@41000000 {
    compatible = "ti,am654-r5fss";
    power-domains = <&k3_pds 129>;
    ti,cluster-mode = <1>;
    #address-cells = <1>;
    #size-cells = <1>;
    ranges = <0x41000000 0x00 0x41000000 0x20000>,
             <0x41400000 0x00 0x41400000 0x20000>;

    mcu_r5f0: r5f@41000000 {
        compatible = "ti,am654-r5f";
        reg = <0x41000000 0x00008000>,
              <0x41010000 0x00008000>;
        reg-names = "atcm", "btcm";
        ti,sci = <&dmsc>;
        ti,sci-dev-id = <159>;
        ti,sci-proc-ids = <0x01 0xFF>;
        resets = <&k3_reset 159 1>;
        firmware-name = "am65x-mcu-r5f0_0-fw";
        ti,atcm-enable = <1>;
        ti,btcm-enable = <1>;
        ti,loczrama = <1>;
        mboxes = <&mailbox0 &mbox_mcu_r5fss0_core0>;
        memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
                        <&mcu_r5fss0_core0_memory_region>;
        sram = <&mcu_r5fss0_core0_sram>;
    };
};

Commonalities

System Device Tree Input

tcm_0a@ffe00000 {
    compatible = "xilinx,tcm-v1.0";
    reg = <0x0 0xffe00000 0x0 0x10000>;
    pnode-id = <0xf>;
    status = "okay";
};

tcm_1a@ffe20000 {
    compatible = "xilinx,tcm-v1.0";
    reg = <0x0 0xffe20000 0x0 0x10000>;
    pnode-id = <0x10>;
    status = "okay";
};

zynqmp_ipi@0 {
    compatible = "xlnx,zynqmp-ipi-mailbox";
    interrupt-parent = <&gic>;
    interrupts = <0 33 4>;
    xlnx,ipi-id = <5>;
    #address-cells = <1>;
    #size-cells = <0>;

    ipi_mailbox_rpu0: mailbox@ff990600 {
        reg = <0xff990600 0x20>,
              <0xff990620 0x20>,
              <0xff9900c0 0x20>,
              <0xff9900e0 0x20>;
        reg-names = "local_request_region",
        "local_response_region",
        "remote_request_region",
        "remote_response_region";
        #mbox-cells = <1>;
        xlnx,ipi-id = <3>;
    };
    ipi_mailbox_rpu1: mailbox@ff990780 {
        reg = <0xff990780 0x20>,
              <0xff9907a0 0x20>,
              <0xff9907c0 0x20>,
              <0xff9905a0 0x20>;
        reg-names = "local_request_region",
        "local_response_region",
        "remote_request_region",
        "remote_response_region";
        #mbox-cells = <1>;
        xlnx,ipi-id = <3>;
    };
};

domains {
    #address-cells = <0x2>;
    #size-cells = <0x2>;

    resource_group: resource_group@0 {
        compatible = "openamp,remoteproc-v1", "openamp,group-v1";
        memory = <0x0 0x3ed40000 0x0 0x4000
              0x0 0x3ed44000 0x0 0x4000
              0x0 0x3ed48000 0x0 0x100000
              0x0 0x3ed00000 0x0 0x40000>;
        access = <&tcm_0_a 0x0>, <&tcm_0_b 0x0>;
    };

    openamp_a53 {
        compatible = "openamp,domain-v1";
        #address-cells = <0x2>;
        #size-cells = <0x2>;

        memory = <0x0 0x80000000 0x0 0x78000000
              0x8 0x0 0x0 0x80000000>;
        cpus = <&cpus_a53 0xf 0x2>;

        /*
         * Flags field, mapping specific
         *
         * memory and reserved-memory:
         *   bit 0: 0/1: RO/RW
         *
         * xlnx,zynqmp-ipi-mailbox:
         *   4 bits for each IPI channel to pass special flags
         *   0-3   bits: channel 0
         *   4-7   bits: channel 1
         *   8-11  bits: channel 2
         *   12-15 bits: channel 3
         * each 4 bits:
         *   bit 0: enable/disable (enable==1)
         *   bit 1: TX/RX (TX==1)
         *   bit 2-3: unused
         *
         * Other cases: unused 
         *
         */
        access = <&ipi_mailbox_rpu0 0x13>;

        /* 0x1: master */
        include = <&resource_group 0x1>;
    };

    openamp_r5 {
        compatible = "openamp,domain-v1";
        #address-cells = <0x2>;
        #size-cells = <0x2>;

        memory = <0x0 0x0 0x0 0x20000000>;
        cpus = <&cpus_r5 0x2 0x80000000>;

        /* 0x0: slave */
        include = <&resource_group 0x0>;
    };
};