Hi All:

Introducing myself to the group, my name is Tony McDowell.  I’m the Director of the OSPO at Rapid Silicon.  I’m ex-Xilinx and was involved in the development of S-DT during my time at Xilinx.  Here at Rapid Silicon we’re adopting S-DT as the standard interchange format from our FPGA EDA tooling (called Raptor) and our embedded SW development workflows.

I see all of the S-DT collateral (the Lopper tooling and specification).  Is all of that up-to-date?  I haven’t seen much activity on this mailing list in a while and I want to make sure I’m pointing our engineering team at the most up-to-date information.

.tony