On 11/7/19 11:15 PM, Stefano Stabellini via System-dt wrote:
Signed-off-by: Stefano Stabellini stefano.stabellini@xilinx.com
source/devicenodes.rst | 88 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 88 insertions(+)
diff --git a/source/devicenodes.rst b/source/devicenodes.rst index 8825ad9..bcf6163 100644 --- a/source/devicenodes.rst +++ b/source/devicenodes.rst @@ -737,3 +737,91 @@ each with their own on-chip L2 and a shared L3. }; }; +.. _sect-cpus-cluster:
+CPUs Cluster Node Properties +----------------------------
+Similarly to ``/cpus``, CPUs cluster nodes do not represent real devices +in the system, but act as containers for children cpu nodes. They group +together a set of CPUs that share the same view of the system, the same +``address-map`` (see section :ref:`sect-address-map`). CPUs clusters are +optional, there can be multiple in a single system, and are represented +by nodes compatible with ``cpus,cluster``.
Hi Stefano,
Earlier this year I have proposed a concept of domain-ctrl [1]. I think it is close to your idea of CPUs clusters since it aim to describe group of hardware blocks that share the same access rights in the system. I was targeting the bus firewalls that we can find on many SoC.
Do you think we can mix these two concepts ? It would, at least, means extend your CPUs cluster concept to be able to describe CPU when they are running in TrustZone.
Regards,
Benjamin
[1] https://lwn.net/ml/linux-kernel/20190227121232.24873-1-benjamin.gaignard@st....
+A child ``cpu`` node represents a system CPU. All ``cpus`` nodes under +the same cluster share key properties (i.e. instruction set) so that a +SMP operating system could run on all of the CPUs in the cluster if +configured to do so.
+.. tabularcolumns:: | p{4cm} p{0.75cm} p{4cm} p{6.5cm} | +.. table:: ``CPUs cluster`` Node Properties
- ======================= ===== ===================== ===============================================
- Property Name Usage Value Type Definition
- ======================= ===== ===================== ===============================================
- ``compatible`` R ``<string list>`` Value shall include "cpus,cluster".
- ``#address-cells`` R ``<u32>`` The value specifies how many cells each
element of the ``reg`` property array takes inchildren of this node.- ``#size-cells`` R ``<u32>`` Value shall be 0. Specifies that no size is
required in the ``reg`` property in children ofthis node.- ``address-map`` SD ``<array>`` If present, it specifies an address mapping
translation between the root node and theaddress space of the CPUs cluster. address-mapis fully described in section:ref:`sect-address-map`.- Usage legend: R=Required, O=Optional, OR=Optional but Recommended, SD=See Definition
- ===================================================================================================
+The CPUs cluster node may contain properties that are common across CPU +nodes.
+Example:
+.. code-block:: dts
- cpus_a53 {
#size-cells = <0x0>;#address-cells = <0x1>;compatible = "cpus,cluster";cpu@0 {reg = <0x0>;compatible = "arm,cortex-a53";device_type = "cpu";};cpu@1 {reg = <0x1>;compatible = "arm,cortex-a53";device_type = "cpu";};cpu@2 {reg = <0x2>;compatible = "arm,cortex-a53";device_type = "cpu";};cpu@3 {reg = <0x3>;compatible = "arm,cortex-a53";device_type = "cpu";};- };
- cpus_r5 {
#size-cells = <0x0>;#address-cells = <0x1>;compatible = "cpus,cluster";cpu@0 {reg = <0x0>;compatible = "arm,cortex-r5";device_type = "cpu";};cpu@1 {reg = <0x1>;compatible = "arm,cortex-r5";device_type = "cpu";};- };